Overview
This serves as an informal repository of my peer-reviewed publications and several selected project/technical reports.
You may also be interested in my Curriculum Vitae (CV).
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Note that publications are provided here only to ensure timely dissemination of technical work on a non-commercial basis. Copyright are maintained by the authors or by other copyright holders. It is understood that all persons viewing this information will adhere to the terms and constraints invoked by each author’s copyright. |
Peer-Reviewed Publications
To Appear in 2013
A Bit of Analysis on Self-Timed Single-Bit On-Chip Links. Jonathan Tse, Benjamin Hill, and Rajit Manohar. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems, May 2013.
NanoMesh: An Asynchronous Kilo-Core System-on-Chip. Jonathan Tse and Andrew Lines. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems, May 2013.
Neural Spiking Dynamics in Asynchronous Digital Circuits. Nabil Imam, Kyle Wecker, Jonathan Tse, Robert Karmazin, and Rajit Manohar. Proceedings of the IEEE 2013 International Joint Conference on Neural Networks, August 2013.
Project Reports
2011
Accelerating a PARSEC Benchmark Using Portable Subword SIMD Saugata Ghose, Shreesha Srinath, and Jonathan Tse.
2009
An Asynchronous Constant-Time Counter for Empty Pipeline Detection. Jonathan Tse and Derek Lockhart.
Memory-Aware DVFS for CMP Systems. Saugata Ghose and Jonathan Tse.
2006
Path Planning with Phased Array SLAM and Voronoi Tessellation. Jonathan Tse, Eric VanWyk, and James Whong.
Network Survivability using Delaunay Triangulation. Jonathan Tse and Eric VanWyk.